Post-doc position available
Topic: Micro-programming optimization of “in-memory computing” circuits
The concept of “in-memory computing”, which consists in bringing computation tasks inside the memory macro, is a novel and promising approach where we need to explore new computing algorithms and methodologies. This approach differs in particular from those known as “processing-in-memory” (PIM) that aim at moving computation elements near the memories (especially DRAM) without changing their internal architecture. Our approach called DRC² (Dynamically Reconfigurable Computing Circuit) consists in adapting conventional memory peripheral circuits (I/O, address decoder, …) to perform logic (AND, OR, XOR, …) and arithmetic (addition/subtraction, …) operations inside the memory macro (SRAM or NVM).
We are looking to recruit a highly motivated post-doctoral researcher to develop an optimized micro programming environment for an “in-memory computing” circuit based on DRC² concept. He/she will interact with both circuit design and software teams to propose an efficient architecture and software tools. More precisely, he/she will:
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Perform a bibliography on potential applications and dedicated programming languages.
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Select key applications and propose an architecture based on DRC² to take advantage of the DRC² capabilities.
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Develop system-level testbenches to evaluate speed and power enhancements compared to existing solutions.
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Interact with circuit design team in order to finely understand the DRC² concept.
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Help to develop a testchip based on DRC² concept driven by a specific set of instructions. The final output will be the electrical validation of a testchip.
Such a co-optimization, i.e. a continuous feedback between design and software teams, is crucial and required for project success.
Required skills:
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Compilers: memory models, tools for parallelism extraction, low-level parallelism, low level code generation, …
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Knowledge on algorithm
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Computing architecture: instruction set architecture, memory hierarchy, vector architecture, …
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Collaboration between design team and compiler team
Appreciated skills:
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Knowledge in circuit design (digital and/or full custom)
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Writing skills for academic publications
Supervisors :
- GIRAUD Bastien (memory design) Phone: +33 (0)4 38 78 17 58, E-mail: bastien.giraud@cea.fr
- FOURNIER Jacques (security)
- CHARLES Henri-Pierre (vision)