• Dedicated Instruction Set for Pattern-based Data Transfers: an Experimental Validation on Systems Containing In-Memory Computing Units Fri, Mar 31, 2023
• CGO new schedule ! (IEEE/ACM International Symposium on Code Generation and Optimization) Wed, Mar 22, 2023
• PARMA DITAM proceedings available online Mon, Mar 13, 2023
• <a href="https://www.mdpi.com/2079-9268/12/1/18">Towards Integration of a Dedicated Memory Controller and Its Instruction Set to Improve Performance of Systems Containing Computational SRAM</a> Fri, Sep 16, 2022
• Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator Thu, Dec 2, 2021
• A 35.6TOPS/W/mm² 3-Stage Pipelined Computational SRAM with Adjustable Form Factor for Highly Data-Centric Applications Thu, Jul 23, 2020
• Data-layout optimization based on memory-access-pattern analysis for source-code performance improvement Fri, Jun 19, 2020
• Precision variable anonymization method supporting transprecision computing Tue, Apr 28, 2020
• Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization Mon, Feb 3, 2020
• Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture Fri, Jan 10, 2020
• Automated Software Protection for the Masses Against Side-Channel Attacks Mon, Feb 4, 2019
• Smart Instruction Codes for In-Memory Computing Architectures Compatible with Standard SRAM Interfaces Tue, Apr 3, 2018
• Software Platform Dedicated for In-Memory Computing Circuit Evaluation Wed, Dec 13, 2017
• Software Platform Dedicated for In-Memory Computing Circuit Evaluation Wed, Oct 18, 2017
• DRC 2 : Dynamically Reconfigurable Computing Circuit based on Memory Architecture Wed, Oct 5, 2016
• ComNet-IoT 2016 international workshop Thu, Feb 11, 2016
• Micro-architectural Simulation of In-order and Out-of-order ARM Microprocessors with gem5 Tue, Apr 29, 2014
• Efficient data driven run-time code generation Wed, Sep 8, 2004