Data-layout optimization based on memory-access-pattern analysis for source-code performance improvement
My student Riyane SID LAKHDAR has presented an article during the 23th International Workshop on Software and Compilers for Embedded Systems (SCOPES20). Maha KOOLI and I are co-authors.
It was during the COVID19 pandemia period and the presentation has to be done remotely. It was my first remote conference participation and the organizer did a good job for the talks organization and the questions session.
Riyane did a very interesting presentation, despite the fact that I’m maybe not objective :-)
The article is available on the SCOPES proceedings Here is a direct link to the article. The DOI is https://doi.org/10.1145/3378678.3391874 .
Les planches de la présentation sont également disponibles sur ce lien.
Abstract : The influence of embedded systems is constantly growing. Increasingly powerful and versatile devices are developed and put on the market at a fast pace. Their functionality and number of features is increasing, and so are the constraints on the systems concerning size, performance, energy dissipation and timing predictability. To meet all these constraints, multi-processor systems on a chip (MPSoCs) are becoming popular in embedded systems. In order to meet the performance and energy constraints of embedded applications, heterogeneous architectures incorporating functional units optimized for specific functions are commonly employed. This technological trend has dramatic consequences on the parallelization, mapping, compiler and design technology used to develop these systems. The SCOPES workshop focuses on the software generation process for these modern embedded systems. Topics of interest include all aspects of the compilation and mapping process of embedded single and multiprocessor systems.